Estimating power while creating the fpga design – Altera PowerPlay Early Power Estimator User Manual

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UG-FPGAPWRCAL-2.0

Altera Corporation

PowerPlay Early Power Estimator User Guide: Stratix, Stratix GX & Cyclone FPGAs

October 2005

Estimating Power

Estimating Power While Creating the FPGA Design

When the FPGA design is partially complete, you can use the power
estimation file (<project name>_pwr_cal.txt) generated by the Quartus II
software to supply information to the PowerPlay early power estimator.
After using the Import Data macro to import the power estimation file
information into the PowerPlay early power estimator, you can edit the
PowerPlay early power estimator to reflect the device resource estimates
for the final design.

f

For more information on generating the power estimation file in the
Quartus II software, refer to the PowerPlay Early Power Estimation chapter
in the Quartus II Handbook.

Table 2–2

shows the advantages and disadvantages when using the

PowerPlay early power estimator and the FPGA design is partially
complete.

Use the following steps to estimate power usage with the PowerPlay
early power estimator if your FPGA design is partially complete:

1.

Compile the partial FPGA design in the Quartus II software.

2.

Generate the power estimation file (<project name>_pwr_cal.txt) in
the Quartus II software by clicking Generate Power Estimation File
(Project menu).

3.

Download the PowerPlay early power estimator from the Altera
website (www.altera.com).

4.

Run the Import Data macro in the PowerPlay early power estimator
to automatically populate the PowerPlay early power estimator
entries.

5.

After running the Import Data macro to populate the PowerPlay
early power estimator, you can manually edit the cells to reflect final
device resource estimates.

Table 2–2. Power Estimation When FPGA Design Is Partially Complete

Advantages

Disadvantages

Accuracy is dependent on user input
and estimate of the final design device
resources

Power estimation can be done early in the FPGA design cycle

Provides the flexibility to automatically fill in the PowerPlay early
power estimator based on Quartus II software compilation results

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