Pweh), Figure 88. timer output timing – Zilog Z80180 User Manual

Page 218

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Z8018x
Family MPU User Manual

202

UM005003-0703

Figure 87. E Clock Timing (Minimum Timing Example of PWEL and

PWEH)

Figure 88. Timer Output Timing

50

52

53

49

53

T

2

T

2

T

W

T

3

T

1

54

49

51

54

50

E

Example

I/O Read

® Opcode Fetch

PHI

E
(I/O Write)

55

Timer Data

Reg. = 0000H

A18/T

OUT

PHI

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