Z8018x family mpu user manual – Zilog Z80180 User Manual
Page 289
Z8018x
Family MPU User Manual
UM005003-0703
273
PUSH IX
PUSH IY
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 2nd Op Code
Address
2nd Op
Code
0
1
0
1
0
1
1
MC3~M
C4
TiTi
*
Z
1
1
1
1
1
1
1
MC5
T1T2T3 SP-1
IXH
IYH
1
0
0
1
1
1
1
MC6
T1T2T3 SP-2
IXL
IYL
1
0
0
1
1
1
1
RET
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 SP
DATA
0
1
0
1
1
1
1
MC3
T1T2T3 SP+1
DATA
0
1
0
1
1
1
1
RET f
(If condition
is false)
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2~M
C3
TiTi
*
Z
1
1
1
1
1
1
1
RET f
(If condition
is true)
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
Ti
*
Z
1
1
1
1
1
1
1
MC3
T1T2T3 SP
DATA
0
1
0
1
1
1
1
MC4
T1T2T3 SP+1
DATA
0
1
0
1
1
1
1
RETI (R0, R1)
RETN
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 2nd Op Code
Address
2nd Op
Code
0
1
0
1
0
1
1
MC3
T1T2T3 SP
DATA
0
1
0
1
1
0
1
MC4
T1T2T3 SP+1
DATA
0
1
0
1
1
1
1
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Instruction
Machine
Cycle
States
Address
Data
RD WR MREQ
IORQ M1 HALT ST