12 smc user configuration register at 0x1204, Table 3-13, Smc_user_config register bit assignments -19 – SMC Networks ARM PL241 User Manual

Page 79: Table 3-14, Smc_periph_id register bit assignments -19, Figure 3-17

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Programmer’s Model

ARM DDI 0389B

Copyright © 2006 ARM Limited. All rights reserved.

3-19

3.3.12

SMC User Configuration Register at 0x1204

The smc_user_config Register is a general purpose write-only register. This register sets
the value of the smc_user_config[7:0] primary outputs. The smc_user_config Register
can be written in all states. Figure 3-17 shows the register bit assignments.

Figure 3-17 smc_user_config Register bit assignments

Table 3-13 lists the register bit assignments.

3.3.13

SMC Peripheral Identification Registers <0-3> at 0x1FE0-0x1FEC

The smc_periph_id Registers are four 8-bit read-only registers, that span address
locations

0xFE0-0xFEC

. The registers can conceptually be treated as a single register that

holds a 32-bit peripheral ID value. They are read by an external master to determine
what version of the device the SMC is. None of the registers 0-3 can be read in the Reset
state.

Table 3-14 lists the register bit assignments.



 



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Table 3-13 smc_user_config Register bit assignments

Bits

Name

Function

[31:8]

-

Reserved, undefined. Write as zero.

[7:0]

smc_user_config

This value sets the state of the smc_user_config[7:0] primary output pins.

Table 3-14 smc_periph_id Register bit assignments

Bits

Name

Description

[31:25]

-

Reserved, read undefined.

[24]

integration_cfg

Configuration options are peripheral-specific.

See SMC Peripheral Identification Register 3 on page 3-21.

[23:20]

-

The peripheral revision number is revision-dependent.

[19:12]

designer

Designer’s ID number. This is

0x41

for ARM.

[11:0]

part_number

Identifies the peripheral. The part number for the SMC is

0x352

.

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