SMC Networks ARM PL241 - Manual (Page 84)

Programmer’s Model
3-24 Copyright © 2006 ARM Limited. All rights reserved. ARM DDI 0389B
SMC PrimeCell Identification Register 2
The smc_pcell_id_2 Register is hard-coded and the fields within the register indicate
the value. Table 3-22 lists the register bit assignments.
SMC PrimeCell Identification Register 3
The smc_pcell_id_3 Register is hard-coded and the fields within the register indicate
the value. Table 3-23 lists the register bit assignments.
Table 3-22 smc_pcell_id_2 Register bit assignments
Bits Name Function
[31:8] - Reserved, read undefined
[7:0] smc_pcell_id_2 These bits read back as 0x5
Table 3-23 smc_pcell_id_3 Register bit assignments
Bits Name Function
[31:8] - Reserved, read undefined
[7:0] smc_pcell_id_3 These bits read back as 0xB1