Sre <mask – Tektronix 070-9180-01 User Manual

Page 86

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IEEE-488.2 Common Commands

3–62

Option 01 VXI Interface Module User Manual

consecutive slots to the right of module “M1” are assigned module
names “M2”, “M3”, ..., “M11”.

All sections on all scanner modules are disjoined
All sections of all VX4330 Modules are set to operate in the mux mode
Close dwell time of all modules is set to 0 seconds
Open dwell time of all modules is set to 0 seconds
All relays on all modules are opened when power is removed from the VXI
chassis

*SRE <mask>

Service Request Enable (SRE) register. This command defines a mask that is
ANDed with the contents of the Status Byte register. If the result of this
operation is non-zero, the Option 01 generates a VXI Request True interrupt.
Bits 0, 1, 3, 6, and 7 of the SRE register are not used. Bits 2, 4, and 5 are set to
enable VXI Request True interrupts to be generated under the conditions listed in
the following table.

Bit No.

Meaning

bit0 (LSB)

Not used

1

Not used

2

The Error/Event queue contains one or more error messages

3

Not used

4

The Output queue contains one or more query responses

5

The contents of the Standard Event Status register ANDed with the
contents of the Standard Event Status Enable register produces a
non-zero result.

6

Not used

7

Not used

*SRE?

Service Request Enable (SRE) query. This command returns the value of the
Service Request Enable register as a numeric value from 0 to 255. Bit 6 is
unused, and is reported as zero.

*STB?

Status Byte Query. This query returns the value of the Status Byte register as a
numeric value between 0 and 255. The Status Byte register contents (with the

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