Rainbow Electronics AT89C5122 - Manual (Page 102)

102
AT8xC5122/23
4202E–SCR–06/06
Read/Write Data FIFO
Read Data FIFO The read access for each OUT endpoint is performed using the UEPDATX register.
After a new valid packet has been received on an Endpoint, the data are stored into the
FIFO and the byte counter of the endpoint is updated (UBYCTX register). The firmware
has to store the endpoint byte counter before any access to the endpoint FIFO. The byte
counter is not updated when reading the FIFO.
To read data from an endpoint, select the correct endpoint number in UEPNUM and
read the UEPDATX register. This action automatically decreases the corresponding
address vector, and the next data is then available in the UEPDATX register.
Write Data FIFO The write access for each IN endpoint is performed using the UEPDATX register.
To write a byte into an IN endpoint FIFO, select the correct endpoint number in UEP-
NUM and write into the UEPDATX register. The corresponding address vector is
automatically increased, and another write can be carried out.
Warning 1: The byte counter is not updated.
Warning 2: Do not write more bytes than supported by the corresponding endpoint.
Figure 54. Endpoint FIFO Configuration
Endpoint 0 - bank 0
Endpoint 1 - bank 0
Endpoint 2 - bank 0
Endpoint 3 - bank 0
Endpoint 4 - bank 0
Endpoint 5 - bank 0
Endpoint 6 - bank 0
Endpoint 6 - bank 1
8 Bytes
32 Bytes
8 Bytes
8 Bytes
64 Bytes
2 x 64 Bytes
B
a
se
A
d
d
res
ses
00H
20H
28H
30H
38H
78H
B8H
F8H
138H
64 Bytes