Rainbow Electronics AT89C5122 User Manual
Page 15
15
AT8xC5122/23
4202E–SCR–06/06
P5.5
7
-
16
-
7
-
VCC
2KV
I/O
1
KB5
Port51
Push-pull
Input
WPD
Input
WPU
P5.6
5
-
14
-
5
-
VCC
2KV
I/O
1
KB6
Port51
Push-pull
Input
WPD
Input
WPU
P5.7
4
-
13
-
4
-
VCC
2KV
I/O
1
KB7
Port51
Push-pull
Input
WPD
Input
WPU
RST
34
16
45
19
34
16
VCC
I/0
Reset Input
The Port pins are driven to their reset conditions when a voltage
lower than V
IL
is applied, whether or not the oscillator is running.
This pin has an internal 10K pull-up resistor which allows the device
to be reset by connecting a capacitor between this pin and VSS.
Asserting RST when the chip is in Idle mode or Power-Down mode
returns the chip to normal operation.
The output is active for at least 12 oscillator periods when an internal
reset occurs.
D+
60
29
5
2
60
29
DVCC
I/O
USB Positive Data Upstream Port
This pin requires an external serial resistor of 27
Ω
(AT8xC122) or
33
Ω
(AT83C5123) and a 1.5 K
Ω
pull-up to
V
REF for full speed
configuration.
D-
59
28
4
1
59
28
DVCC
I/O
USB Negative Data Upstream Port
This pin requires an external serial resistor of 27
Ω
(AT8xC122) or
33
Ω
(AT83C5123)
V
REF
61
30
6
3
61
30
AVCC
O
USB Voltage Reference: 3.0 <
V
REF < 3.6 V
V
REF
can be connected to D+ through a 1.5 K
Ω
resistor. The
V
REF
voltage is controlled by software.
XTAL
1
31
14
42
17
31
14
VCC
I
Input to the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal or an external oscillator must
be connected to this pin.
XTAL
2
32
15
43
18
32
15
VCC
O
Output of the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal circuit must be connected to
this pin. If an external oscillator is used, leave XTAL2 unconnected.
EA/
VCC
63
-
8
-
63
-
VCC
I
External Access Enable (Only AT8xC5122)
EA must be strapped to ground in order to enable the device to fetch
code from external memory locations 0000h to FFFFh.
If security level 1 is programmed, EA will be latched on reset.
Warning : EA pin cannot be left floating. If the External Access
Enable mode is not used, EA pin must be strapped to VCC. If this last
condition is not met,the MCU may have an unpredictable behaviour.
VCC (Only AT89C5122DS)
ALE
21
-
32
-
21
-
VCC
O
Address Latch Enable/Program Pulse: Output pulse for latching
the low byte of the address during an access to external memory. In
normal operation, ALE is emitted at a constant rate of 1/6 (1/3 in X2
mode) the oscillator frequency, and can be used for external timing or
clocking. Note that one ALE pulse is skipped during each access to
external data memory. ALE can be disabled by setting SFR’s
AUXR.0 bit. With this bit set, ALE will be inactive during internal
fetches
Table 2. Pin Description (Continued)
Port
VQ
FP
6
4
VQ
FP
3
2
P
L
CC6
8
P
L
CC2
8
QF
N
6
4
QF
N
3
2
Internal
Power
Supply
ESD
I/O
Reset
Level
Alt
Reset
Config
Conf 1
Conf 2
Conf 3
Led