Rainbow Electronics AT89C5122 User Manual
Page 178
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178
AT8xC5122/23
4202E–SCR–06/06
Reset Value = XXXX X000b
The three lower bits (S0, S1, S2) located into WDTPRG register enables to program the
WDT duration.
To compute WD Timeout, the following formula must be applied:
Time Out = 6 * (2
14
* 2
Svalue
- 1 ) / F
CK_WD
Note:
Svalue represents the decimal value of (S2 S1 S0)
Table 109. Watchdog Timer Out Register - WDTPRG (0A7h)
7
6
5
4
3
2
1
0
-
-
-
-
-
S2
S1
S0
Bit
Number
Bit
Mnemonic
Description
7 - 3
-
Reserved
The value read from this bit is indeterminate. Do not change these bits.
2
S2
WDT Time-out select bit 2
1
S1
WDT Time-out select bit 1
0
S0
WDT Time-out select bit 0
Table 110. Machine Cycle Count
S2
S1
S0
Machine Cycle Count
0
0
0
2
14
- 1
0
0
1
2
15
- 1
0
1
0
2
16
- 1
0
1
1
2
17
- 1
1
0
0
2
18
- 1
1
0
1
2
19
- 1
1
1
0
2
20
- 1
1
1
1
2
21
- 1
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