Mode 3 (two 8-bit timers), Timer 1, Ugh figure 96 – Rainbow Electronics AT89C5122 User Manual

Page 150

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150

AT8xC5122/23

4202E–SCR–06/06

Mode 3 (Two 8-bit Timers)

Mode 3 configures Timer 0 so that registers TL0 and TH0 operate as 8-bit Timers (see
Figure 96). This mode is provided for applications requiring an additional 8-bit Timer or
Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in the TMOD register, and
TR0 and TF0 in the TCON register in the normal manner. TH0 is locked into a Timer
function (counting F

UART

) and takes over use of the Timer 1 interrupt (TF1) and run con-

trol (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode 3.

Figure 97 gives the autoreload period calculation formulas for both TF0 and TF1 flags.

Figure 96. Timer/Counter 0 in Mode 3: Two 8-bit Counters

Figure 97. Mode 3 Overflow Period Formula

Timer 1

Timer 1 is identical to Timer 0 except for Mode 3 which is a hold-count mode. The fol-
lowing comments help to understand the differences:

Timer 1 functions as either a Timer or an event Counter in three operating modes.
Figure 90 through Figure 94 show the logical configuration for modes 0, 1, and 2.
Mode 3 of Timer 1 is a hold-count mode.

Timer 1 is controlled by the four high-order bits of the TMOD register (see Table 89
on page 153) and bi
ts 2, 3, 6 and 7 of the TCON register (see Table 88 on page
152
). The TMOD register selects the method of Timer gating (GATE1), Timer or
Counter operation (C/T1#) and the operating mode (M11 and M01). The TCON
register provides Timer 1 control functions: overflow flag (TF1), run control bit (TR1),
interrupt flag (IE1) and the interrupt type control bit (IT1).

Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best
suited for this purpose.

For normal Timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented
by the selected input. Setting GATE1 and TR1 allows external pin INT1# to control
Timer operation.

Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag and
generates an interrupt request.

TR0

TCON.4

TF0

TCON.5

INT0#

0

1

GATE0

TMOD.3

Overflow

Timer 0
Interrupt
Request

C/T0#

TMOD.2

TL0

(8 bits)

TR1

TCON.6

TH0

(8 bits)

TF1

TCON.7

Overflow

Timer 1
Interrupt
Request

T0

FCK_T0

/6

FCK_T0

/6

TF0

PER

=

F

CK_T0

6

(256 – TL0)

TF1

PER

=

F

CK_T0

6

(256 – TH0)

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