Cirrus Logic CS8952 - Manual (Page 51)

CS8952
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 51
DS206F1
6.15 Descrambler Key Initialization Register - Address 16h
15 14 13 12 11 10 9 8
Load Reserved Descrambler Initialization Key
7 6 5 4 3 2 1 0
Descrambler Initialization Key
BIT NAME TYPE RESET DESCRIPTION
15 Load Read/Set 0 When this bit is set, the descrambler will be loaded
with the value in the Descrambler Initialization Key
field. When the load is complete, this bit will clear
automatically.
14:11 Reserved Read Only 0000 These bits should be read as don’t cares and, when
written, should be written to 0.
10:0 Descrambler Initial-
ization Key Read/Write Reset value is
dependent on the
PHY Address field
of the Self Status
Register (address
19h).
This register allows the Descrambler to be loaded
with a user-definable key sequence. A value of 000h
has the effect of bypassing the descrambler function.
This is valuable for testing purposes to allow a deter-
ministic response to test stimulus without a synchro-
nization delay.
Note: This field is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.