Cirrus Logic CS8952 - Manual (Page 69)

CS8952
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 69
DS206F1
In order to conform with Annex 22B of the IEEE 802.3u specification, the MII_DRV pin should be pulled
high during power-up or reset, and the RX_CLK pin should have an external 33
Ω series resistor. For
systems not required to drive external connectors and cables as described in the IEEE802.3u
specification, the external series resistor may not be necessary.
RX_DV/MII_DRV - Receive Data Valid/MII Drive Strength. Input/Tri-State Output, Pin 33.
Asserted high to indicate valid data nibbles are present on RXD[3:0].
At power-up or at reset, this pin is used as an input to determine the drive strength of the MII output
drivers. When the pin is low, all MII output drivers will be standard 4 mA CMOS drivers. When high,
additional drive strength will be added to the MII output drivers. This pin includes a weak internal pull-
down (> 20 k
Ω), or the value may be set by an external 4.7 kΩ pull-up or pull-down resistor.
In order to conform with Annex 22B of the IEEE 802.3u specification, this pin should be pulled high
during power-up or reset and should have an external 33
Ω series resistor. For systems not required to
drive external connectors and cables as described in the IEEE802.3u specification, it may be possible to
reduce overall power consumption by pulling the pin low at power-up or reset, and the external series
resistor may not be necessary.
RX_EN - Receive Enable. Input, Pin 14.
When high, signals RXD[3:0], RX_CLK, RX_DV, and RX_ER are enabled. When low, these signals are
tri-stated. RX_EN allows the received data signals of multiple PHY transceivers to share the same MII
bus.
This pin includes a weak internal pull-up (> 150 k Ω), or the value may be set by an external 10 kΩ pull-
up or pull-down resistor.