Configuration features, Remote system upgrade in dual compressed images, Configuration features -8 – Altera MAX 10 FPGA User Manual

Page 12: Remote system upgrade in dual compressed images -8

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Configuration Settings

Description

Default State/Value

Allow encrypted POF only

If enabled, configuration error will occur if

unencrypted

.pof

is used.

Disable

JTAG Secure

(3)

To disable or enable the JTAG Secure feature.

Disable

Enable Watchdog

To disable or enable the watchdog timer for

remote system upgrade.

Enable

Watchdog value

To set the watchdog timer value for remote system

upgrade.

0x1FFF

(4)

Related Information

.pof and ICB Settings

on page 3-5

.pof Generation through Convert Programming Files

on page 3-6

Provides more information about setting the ICB during .pof generation using Convert Programming

File.

Instant-on

on page 2-24

Provides more information about Instant ON and other power on reset scheme.

Verify Protect

on page 2-17

JTAG Secure Mode

on page 2-16

ISP and Real-Time ISP Instructions

on page 2-5

User Watchdog Timer

on page 2-14

Configuration Features

Remote System Upgrade in Dual Compressed Images

MAX 10 devices support the remote system upgrade feature. By default, the remote system upgrade

feature is enabled in all MAX 10 devices when you select the dual compressed image internal

configuration mode.
The remote system upgrade feature in MAX 10 devices offers the following capabilities:
• Manages remote configuration

• Provides error detection, recovery, and information

• Supports direct-to-application configuration image

• Supports compressed and encrypted

.pof

You can use the Altera Dual Configuration IP core or the remote system upgrade circuitry to access the

remote system upgrade block in MAX 10 devices.

(3)

The JTAG Secure feature will be disabled by default in Quartus II. If you are interested in using the JTAG

Secure feature, contact Altera for support.

(4)

The watchdog timer value depends on the MAX 10 you are using. Refer to the Watchdog Timer section for

more information.

2-8

Configuration Features

UG-M10CONFIG

2015.05.04

Altera Corporation

MAX 10 FPGA Configuration Schemes and Features

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