Icb settings in jtag configuration, Icb settings in jtag configuration -4 – Altera MAX 10 FPGA User Manual

Page 34

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JTAGEN

If you use the

JTAGEN

pin, Altera recommends the following settings:

• Once you entered user mode and JTAG pins are regular I/O pins—connect the

JTAGEN

pin to a weak

pull-down (1 kΩ).

• Once you entered user mode and JTAG pins are dedicated pins—connect the

JTAGEN

pin to a weak

pull-up (10 kΩ).

ICB Settings in JTAG Configuration

The ICB settings is loaded into the device during

.pof

programming of the internal configuration scheme.

The .sof used during JTAG configuration does not contain ICB settings. The Quartus II Programmer will

make the necessary setting based on the following:
• Device without ICB settings—ICB settings cleared from the internal flash or new device

• Device with ICB settings—prior ICB settings programmed using

.pof

Device Without ICB Settings

For devices without ICB settings, the default value will be used. However, Quartus II Programmer disables

the user watchdog timer by setting the Watchdog Timer Enable bit to 0. This step is to avoid any

unwanted reconfiguration occurred due to user watchdog timeout.
If the default ICB setting is undesired, you can program the desirable ICB setting first by using

.pof

programming before doing the JTAG configuration.

Device With ICB Settings

For device with ICB settings, the settings will be preserved until the internal flash is erased. Hence, you

need to remember the previous ICB settings because JTAG configuration will follow the ICB setting and

behave accordingly.
If the prior ICB setting is undesired, you can program the desirable ICB setting first by using

.pof

programming before doing the JTAG configuration.

Related Information

.pof and ICB Settings

on page 3-5

.pof Generation through Convert Programming Files

on page 3-6

Provides more information about setting the ICB during .pof generation using Convert Programming

File.

Instant-on

on page 2-24

Provides more information about Instant ON and other power on reset scheme.

Verify Protect

on page 2-17

JTAG Secure Mode

on page 2-16

ISP and Real-Time ISP Instructions

on page 2-5

User Watchdog Timer

on page 2-14

Configuring MAX 10 Devices using Internal Configuration

There are three main steps for using internal configuration scheme for MAX 10 devices.

3-4

ICB Settings in JTAG Configuration

UG-M10CONFIG

2015.05.04

Altera Corporation

MAX 10 FPGA Configuration Design Guidelines

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