Altera MAX 10 FPGA - Manual (Page 38)

• To program any of the CFM0/CFM1/CFM2 only, select the corresponding CFM in the Program/
Configure column.
• To program the UFM only, select the UFM in the Program/Configure column.
• To program the CFM and UFM only, select the CFM and UFM in the Program/Configure column.
Note: ICB setting is preserved in this option. However, before the programming starts, Quartus II
Programmer will make sure the ICB setting in the device and the ICB setting in the
selected .pof are the same. If the ICB settings are different, Quartus II Programmer will
overwrite the ICB setting.
• To program the whole internal flash including the ICB settings, select the <yourpoffile.pof> in the
Program/Configure column.
7. To enable the real-time ISP mode, turn-on the Enable real-time ISP to allow background program‐
ming.
8. After all settings are set, click Start to start programming.
Accessing the Remote System Upgrade Block Through User Interface
The following example shows how the input and output ports of a WYSIWYG atom are defined in the
MAX 10 device.
fiftyfivenm_rublock <rublock_name>
(
.clk(<clock source>),
.shiftnld(<shiftnld source>),
.captnupdt(<captnupdt source>),
.regin(<regin input source from the core>),
.rsttimer(<input signal to reset the watchdog timer>),
.rconfig(<input signal to initiate configuration>),
.regout(<data output destination to core>),
);
defparam <rublock_name>.sim_init_config = <initial configuration for simulation
only>;
defparam <rublock_name>.sim_init_watchdog_value = <initial watchdog value for
simulation only>;
defparam <rublock_name>.sim_init_config = <initial status register value for
simulation only>;
Related Information
Remote System Upgrade Circuitry Signals on page 2-10
Provides more information about remote system upgrade signals.
Error Detection
This section covers detailed guidelines on error detection.
Verifying Error Detection Functionality
You can inject a soft error by changing the 32-bit CRC storage register in the CRC circuitry. After
verifying the failure induced, you can restore the 32-bit CRC value to the correct CRC value using the
same instruction and inserting the correct value. Be sure to read out the correct value before updating it
with a known bad value.
3-8 Accessing the Remote System Upgrade Block Through User Interface
UG-M10CONFIG
2015.05.04
Altera Corporation MAX 10 FPGA Configuration Design Guidelines
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