Altera MAX 10 FPGA - Manual (Page 47)

CFM0 (image 0)
Encryption Key
Key Stored in the
Device
Allow Encrypted POF
Only
Design Loaded After Power-up
Key Y No key Enabled Configuration Fail
Key Y Key X Enabled Configuration Fail
Key Y Key Y Enabled image 0
UG-M10CONFIG
2015.05.04
Encryption in Internal Configuration 3-17
MAX 10 FPGA Configuration Design Guidelines Altera Corporation
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