FANUC Robotics America V7865* - Manual (Page 68)

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V7865 Product Manual
The “WDT Enable” bit is used to enable the Watchdog Timer function. This bit must
be set to “1” in order for the Watchdog Timer to function. Note that since all registers
default to zero after reset, the Watchdog Timer is always disabled after a reset. The
Watchdog Timer must be re-enabled by the application software after reset in order
for the Watchdog Timer to continue to operate. Once the Watchdog Timer is enabled,
the application software must refresh the Watchdog Timer within the selected timeout
period to prevent a reset or SERR# from being generated. The Watchdog Timer is
refreshed by performing a write to the WDT Keepalive register (WKPA). The data
written is irrelevant.
WDT Keepalive Register (WKPA)
When enabled, the Watchdog Timer is prevented from resetting the system by writing
to the WDT Keepalive Register (WKPA) located at offset 0x0C from the address in
BAR2 within the selected timeout period. The data written to this location is
irrelevant.