Multichannel scanning considerations, Figure 3-2. dither, Multichannel scanning considerations -4 – National Instruments PCI-6023E User Manual

Page 24: Figure 3-2, Dither -4, Sition. figure 3, Re 3-2b sho, Re 3-2c, N in figure 3-2d, D. dither enabled; average of 50 acquisitions

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Chapter 3

Hardware Overview

PCI-6023E/6024E/6025E User Manual

3-4

©

National Instruments Corporation

Figure 3-2. Dither

Multichannel Scanning Considerations

The PCI-6023E, PCI-6024E, and PCI-6025E boards can scan multiple
channels at the same maximum rate as their single-channel rate; however,
pay careful attention to the settling times for each of the boards. No extra
settling time is necessary between channels as long as the gain is constant
and source impedances are low. Refer to Appendix A,

Specifications

, for a

complete listing of settling times for each of the boards.

When scanning among channels at various gains, the settling times may
increase. When the PGIA switches to a higher gain, the signal on the
previous channel may be well outside the new, smaller range. For instance,
suppose a 4 V signal is connected to channel 0 and a 1 mV signal is
connected to channel 1, and suppose the PGIA is programmed to apply a
gain of one to channel 0 and a gain of 100 to channel 1. When the

a. Dither disabled; no averaging

b. Dither disabled; average of 50 acquisitions

c. Dither enabled; no averaging

100

200

300

400

0

500

-4.0

-2.0

0.0

2.0

4.0

-6.0

d. Dither enabled; average of 50 acquisitions

LSBs

LSBs

LSBs

LSBs

6.0

100

200

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400

0

500

-4.0

-2.0

0.0

2.0

4.0

-6.0

6.0

100

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0

500

-4.0

-2.0

0.0

2.0

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-6.0

6.0

100

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0

500

-4.0

-2.0

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6.0

a. Dither disabled; no averaging

b. Dither disabled; average of 50 acquisitions

c. Dither enabled; no averaging

100

200

300

400

0

500

-4.0

-2.0

0.0

2.0

4.0

-6.0

d. Dither enabled; average of 50 acquisitions

LSBs

LSBs

LSBs

LSBs

6.0

100

200

300

400

0

500

-4.0

-2.0

0.0

2.0

4.0

-6.0

6.0

100

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0

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-4.0

-2.0

0.0

2.0

4.0

-6.0

6.0

100

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300

400

0

500

-4.0

-2.0

0.0

2.0

4.0

-6.0

6.0

PCI.book Page 4 Wednesday, September 16, 1998 9:09 AM

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