Figure 4-25. startscan input signal timing, Figure 4-26. startscan output signal timing, Figure 4-25 – National Instruments PCI-6023E User Manual
Page 66: Startscan input signal timing -37, Figure 4-26, Startscan output signal timing -37, Startscan will be deasserted t
Chapter 4
Signal Connections
©
National Instruments Corporation
4-37
PCI-6023E/6024E/6025E User Manual
STARTSCAN will be deasserted t
off
after the last conversion in the scan is
initiated. This output is set to tri-state at startup.
Figures 4-25 and 4-26 show the input and output timing requirements for
the STARTSCAN signal.
Figure 4-25. STARTSCAN Input Signal Timing
Figure 4-26. STARTSCAN Output Signal Timing
The CONVERT* pulses are masked off until the board generates the
STARTSCAN signal. If you are using internally generated conversions, the
first CONVERT* appears when the onboard sample interval counter
reaches zero. If you select an external CONVERT*, the first external pulse
after STARTSCAN generates a conversion. The STARTSCAN pulses
should be separated by at least one scan period.
Rising-edge
polarity
Falling-edge
polarity
t
w
t
w
= 10 ns minimum
t
w
= 50-100 ns
a. Start of Scan
toff
t
off
= 10 ns minimum
Start Pulse
CONVERT*
STARTSCAN
STARTSCAN
b. Scan in Progress, Two Conversions per Scan
t
w
PCI.book Page 37 Wednesday, September 16, 1998 9:09 AM