5 busreq timing, Product preview – Texas Instruments TMS320C6454 User Manual
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PRODUCT PREVIEW
7.10.5 BUSREQ Timing
AECLKOUTx
1
ABUSREQ
1
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
Table 7-50. Switching Characteristics Over Recommended Operating Conditions for the BUSREQ Cycles
for EMIFA Module (see
-720
-850
NO.
PARAMETER
UNIT
-1000
MIN
MAX
1
t
d(AEKOH-ABUSRV)
Delay time, AECLKOUT high to ABUSREQ valid
1
5.5
ns
Figure 7-40. BUSREQ Timing for EMIFA
C64x+ Peripheral Information and Electrical Specifications
159
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