Rockwell Automation 1794-ID2 U.MNL INCREMENTAL ENCODER - Manual (Page 60)

5–8 How Communication Takes Place and I/O Image Table Mapping with the DeviceNet Adapter
Publication 1794ĆUM015B-EN-P - May 2001
Definition Bit Word
Word 5 Filter Selection
Bit 00 Filter A0 enable - When this bit is set (1), anda counter 0 is in mode 000 (pulse counting), signal A0 is filtered by
a digital low pass filter with selectable filter constant.
Bit 01 Filter A1 enable - When this bit is set (1), anda counter 1 is in mode 000 (pulse counting), signal A1 is filtered by
a digital low pass filter with selectable filter constant.
Bit 02Ć07 Unused
Bits 08Ć09
(10Ć11)
09
(11
)
08
(1
0)
Filter Constant bits - This constant is common to both counters.
0 0 73.5kHZ or minimum 0.007ms pulsewidth
0 1 37.8kHz or minimum 0.013ms pulsewidth
1 0 12.8kHz or minimum 0.04ms pulsewidth
1 1 1.2kHz or minimum 0.4ms pulsewidth
Write
Words
6-7
Bits 00-15
(00-17)
Not used - set to 0.