ADLINK PXI-2006 User Manual

Page 70

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60

Operation Theory

should be always higher then the Low_Threshold voltage set-
ting.

Figure 4-34: Inside-Region analog trigger condition

High-Hysteresis analog trigger condition

Figure 4-35 shows the high-hysteresis analog trigger condition,
the trigger signal is generated when the input analog signal
level is greater than the High_Threshold voltage, and the
Low_Threshold voltage determines the hysteresis duration.
Note the High_Threshold setting should be always higher then
the Low_Threshold voltage setting.

Figure 4-35: High-Hysteresis analog trigger condition

Low-Hysteresis analog trigger condition

Figure 4-36 shows the low-hysteresis analog trigger condition,
the trigger signal is generated when the input analog signal
level is less than the Low_Threshold voltage, and the

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