ADLINK PXI-2006 - Manual (Page 79)

Operation Theory 69
For example:
We want to synchronize the A/D operation through the ADCONV
signal for 4 DAQ/PXI-20XX cards. Card 1 is the master, and Card
2, 3, 4 are slaves. Card 1 receives an external digital trigger to
start the post trigger mode acquisition. The SSI setting could be:
1. Set the SSI_ADCONV signal of Card 1 to be the master.
2. Set the SSI_ADCONV signals of Card 2, 3, 4 to be the
slaves.
3. Set external digital trigger for Card 1’s A/D operation.
4. Set the SI_counter and the post scan counter (PSC) of
all other cards.
5. Start DMA operations for all cards, thus all the cards are
waiting for the trigger event.
When the digital trigger condition of Card 1 occurs, Card 1 will
internally generate the ADCONV signal and output this ADCONV
signal to SSI_ADCONV signal of Card 2, 3 and 4 through the SSI/
PXI connectors. Thus we can achieve 16-channel acquisition
simultaneously.
You could arbitrarily choose each of the 6 timing signals as the SSI
master from any one of the cards. The SSI master can output the
internal timing signals to the SSI slaves. With the SSI, users could
achieve better card-to-card synchronization.
Note that when power-up or reset, the DAQ timing signals are
reset to use the internal generated timing signals.
AI_Trig_Out and AO_Trig_Out
AI_Trig_Out (or AO_Trig_Out) is the signal output following one of
the four trigger sources (software trigger, analog trigger, digital
trigger and SSI trigger) selected by the user. That is, AI_Trig_Out
follows the A/D trigger source, and AO_Trig_Out follows the D/A
trigger source. These two sig-nals can be used to control external
peripheral circuits or boards, or can be used as synchronization
control signals. The signal level of the AI_Trig_Out and
AO_Trig_Out are TTL-compatible.
Note: AI_Trig_Out and AO_Trig_Out are output pins on J5 (68-pin