ADLINK PXI-2006 - Manual (Page 71)

Operation Theory 61
High_Threshold voltage determines the hysteresis duration.
Note the High_Threshold setting should be always higher then
the Low_Threshold voltage setting.
Figure 4-36: Low-Hysteresis analog trigger condition
External Digital Trigger
An external digital trigger occurs when a rising edge or a falling
edge is detected on the digital signal connected to the EXT-
DTRIG or the EXTWFTRG of the 68-pin connector for external
digital trigger. The EXTDTRIG is dedicated for A/D process,
and the EXTWFTRG is used for D/A process. Users can pro-
gram the trigger polarity through ADLINK’s software drivers
easily. Note that the signal level of the external digital trigger
signals should be TTL-compatible, and the minimum pulse is
20ns.
Figure 4-37: External digital trigger
4.6 User-controllable Timing Signals
In order to meet the requirements for user-specific timing and the
re-quirements for synchronizing multiple cards, the DAQ/PXI-