Altera QDRII SRAM Controller MegaCore Function - Manual (Page 65)

Altera Corporation MegaCore Version 9.1 3–33
November 2009 QDRII SRAM Controller MegaCore Function User Guide
Functional Description
Project Settings
Table 3–15 shows the example settings.
Table 3–16 shows the variation path parameters.
Table 3–17 shows the pin prefixes parameter.
Table 3–15. Example Settings
Parameter Description
Automatically apply QDR
SRAM controller-specific
constraints to the
Quartus II project When this option is turned on, the next time you compile, the Quartus II software
automatically runs the add constraints script. Turn off this option if you do not want
the script to run automatically.
Update the example
design file that
instantiates the QDRII
SRAM controller
variation When this option is turned on, IP Toolbench parses and updates the example design
file. It only updates sections that are between the following markers:
<<START MEGAWIZARD INSERT <tagname>
<<END MEGAWIZARD INSERT <tagname>
If you edit the example design file, ensure that your changes are outside of the
markers or remove the markers. Once you remove the markers, you must keep the
file updated, because IP Toolbench can no longer update the file.
Update example design
system PLL When this option is turned on, IP Toolbench automatically overwrites the PLL.Turn off
this option, if you do not want the wizard to overwrite the PLL. The first time you
create a custom variation, you must turn on Update example design system PLL.
Table 3–16. Variation Path Parameters
Parameter Description
Enable hierarchy control The constraints script analyzes your design, to automatically extract the hierarchy to
your variation. To prevent the constraints script analyzing your design, turn on
Enable hierarchy control, and enter the correct hierarchy path to your controller.
Hierarchy path to
variation The hierarchy path is the path to your QDRII SRAM controller, minus the top-level
name. The hierarchy entered in the wizard must match your design, because the
constraints scripts rely on this path for correct operation.
Table 3–17. Pin Prefixes
Parameter Description
Prefix all QDRII SRAM
pins with This string prefixes the pin names for the FPGA pins that are connected to the QDRII
SRAM controller.