Altera QDRII SRAM Controller MegaCore Function - Manual (Page 8)

1–4 MegaCore Version 9.1 Altera Corporation
QDRII SRAM Controller MegaCore Function User Guide November 2009
Performance and Resource Utilization
■ Simulate the behavior of a megafunction (Altera MegaCore function
or AMPP
SM megafunction) within your system
■ Verify the functionality of your design, as well as evaluate its size
and speed quickly and easily
■ Generate time-limited device programming files for designs that
include megafunctions
■ Program a device and verify your design in hardware
You only need to purchase a license for the megafunction when you are
completely satisfied with its functionality and performance, and want to
take your design to production.
f
For more information on OpenCore Plus hardware evaluation using the
QDRII SRAM Controller, refer to
“OpenCore Plus Time-Out Behavior”
on page 3–10 and AN 320: OpenCore Plus Evaluation of Megafunctions .
Performance
and Resource
Utilization Table 1–3 shows typical expected performance for the QDRII SRAM
Controller MegaCore function, with the Quartus II software version 9.1.
1 The example driver, which only demonstrates basic read and
write operation, can limit the performance, particularly in wide
interfaces. To improve performance, replace the example driver
or remove it and use the virtual pins on the controller.
Stratix II and Stratix II GX devices support QDRII SRAM at up to
300 MHz/1,200 Megabits per second (Mbps). Stratix and Stratix GX
devices support QDRII SRAM at up to 200 MHz/800 Mbps.
Tables 1–4
through 1–6 show the clock frequency support for each device family,
with the Quartus II software version 9.1.
Table 1–3. Performance
Device f
MAX
(MHz)
Stratix II (EP2S60F1020C3) 300
Stratix II GX (EP2SGX30CF780C3) 300
Stratix (EP1S25F780C5) 200