Motorola DSP56012 - Manual (Page 222)

8-12 DSP56012 User’s Manual MOTOROLA
Digital Audio Transmitter
DAX Internal Architecture
8.5.6 DAX Non-Audio Data Buffer (XNADBUF)
The XNADBUF is a 3-bit register that temporarily holds Channel B non-audio data
(XVB, XUB and XCB) for the current transmission while the Channel A data is being
transmitted. This mechanism provides programmers more instruction cycles to store
the next frame’s non-audio data to the XCB, XUB, XVB, XCA, XUA and XVA bits in
the XCTR. The data in the XNADBUF register is transferred to the XADSR along with
the contents of the XADBUF register at the beginning of Channel B transmission.
Note: The XNADBUF register is not directly accessible by DSP instructions.
8.5.7 DAX Parity Generator (PRTYG)
The PRTYG generates the parity bit for the sub-frame being transmitted. The
generated parity bit ensures that sub-frame bits four to thirty-one will carry an even
number of 1s and 0s.
8.5.8 DAX Biphase Encoder
The DAX biphase encoder encodes each audio and non-audio bit into its biphase
mark format, and shifts this encoded data out to the ADO output pin synchronous to
the biphase clock.
8.5.9 DAX Preamble Generator
The DAX preamble generator automatically generates one of three preambles in the
8-bit preamble shift register at the beginning of each sub-frame transmission, and
shifts it out. The generated preambles always start with “0”. Bit patterns of
preambles generated in the preamble generator are shown in
Table 8-4 . The
preamble bits are already in the biphase mark format.
Table 8-4 Preamble Bit Patterns
Preamble Bit Pattern Channel
X 00011101 A
Y 00011011 B
Z 00010111 A (first in block)