Motorola DSP56012 - Manual (Page 244)

B-12 DSP56012 User’s Manual MOTOROLA
Programming Reference
Register and Y memory
data move (.....)S1,D1 Y:<ea>,D2 mv mv * * - - - - - -
(.....)S1,D1 S2,Y:<ea>
(.....)S1,D1 #xxxxxx,D2
(.....)Y0,A A,Y:<ea>
(.....)Y0,B B,Y:<ea>
Long memory data move (.....)L:<ea>,D mv mv * * - - - - - -
(.....)L:<aa>,D
(.....)S,L:<ea>
(.....)S,L:<aa>
XY memory data move (.....)X:<eax>,D1 Y:<eay>,D2 mv mv * * - - - - - -
(.....)X:<eax>,D1 S2,Y:<eay>
(.....)S1,X:<eax> Y:<eay>,D2
(.....)S1,X:<eax> S2,Y:<eay>
MOVE(C) X:<ea>,D1 1+ea 2+mvc ? ? ? ? ? ? ? ?
X:<aa>,D1
S1,X:<ea>
S1,X:<aa>
Y:<ea>,D1
Y:<aa>,D1
S1,Y:<ea>
S1,Y:<aa>
S1,D2
S2,D1
#xxxx,D1
#xx,D1
MOVE(M) P:<ea>,D 1+ea 2+mvm ? ? ? ? ? ? ? ?
S,P:<ea>
S,P:<aa>
P:<aa>,D
MOVE(P) X:<pp>,D 1+ea 2+mvp ? ? ? ? ? ? ? ?
X:<pp>,X:<ea>
Table B-3 Instruction Set Summary (Sheet 5 of 7)
Mnemonic Syntax Parallel Moves Instruction
Program
Words
Osc.
Clock
Cycles
Status Request
Bits:
S L E U N Z V C
- indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition; see the instruction descriptions in Appendix A of
the
DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared