Figure49 hi flag operation, 6 hsr reserved—bits 5 and 6, 7 hsr dma status (dma)—bit 7 – Motorola DSP56012 User Manual
Page 98: 3 hi receive data register (horx), Hsr reserved—bits 5 and 6 -18, Hsr dma status (dma)—bit 7 -18, Hi receive data register (horx) -18, Figure 4-9, Hi flag operation -18, For additional information. an
Advertising
Figure49 hi flag operation, 6 hsr reserved—bits 5 and 6, 7 hsr dma status (dma)—bit 7 | 3 hi receive data register (horx), Hsr reserved—bits 5 and 6 -18, Hsr dma status (dma)—bit 7 -18, Hi receive data register (horx) -18, Figure 4-9, Hi flag operation -18, For additional information. an | Motorola DSP56012 User Manual | Page 98 / 270
Advertising