In the bic register (tr.bic.1). see, Figure 10-15, Figure 10-16 – Maxim Integrated DS33R11 User Manual
Page 109
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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
109 of 344
Figure 10-15. Simplified Diagram of BERT in Network Direction
PER-CHANNEL AND
F-BIT (T1 MODE)
MAPPING
BERT
TRANSMITTER
BERT
RECEIVER
1
0
FROM RECEIVE
FRAMER
TO RECEIVE
SYSTEM
BACKPLANE
INTERFACE
FROM TRANSMIT
SYSTEM
BACKPLANE
INTERFACE
TO TRANSMIT
FRAMER
Figure 10-16. Simplified Diagram of BERT in Backplane Direction
BERT
TRANSMITTER
BERT
RECEIVER
PER-CHANNEL AND
F-BIT (T1 MODE)
MAPPING
1
0
FROM RECEIVE
FRAMER
TO RECEIVE
SYSTEM
BACKPLANE
INTERFACE
FROM TRANSMIT
SYSTEM
BACKPLANE
INTERFACE
TO TRANSMIT
FRAMER
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