Maxim Integrated DS33R11 - Manual (Page 175)

DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
175 of 344
Register Name:
SU.MACRD1
Register Description: MAC Read Data Byte 1
Register Address: 143h
Bit
# 7 6 5 4 3 2 1 0
Name MACRD15 MACRD14 MACRD13 MACRD12 MACRD11 MACRD10 MACRD9 MACRD8
Default 0 0 0 0 0 0 0 0
Bits 0 - 7: MAC Read Data 1 (MACRD8-15) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the
SU.MACRWC .MCS bit is zero.
Register Name:
SU.MACRD2
Register Description: MAC Read Data Byte 2
Register Address: 144h
Bit
# 7 6 5 4 3 2 1 0
Name MACRD23 MACRD22 MACRD21 MACRD20 MACRD19 MACRD18 MACRD17 MACRD16
Default 0 0 0 0 0 0 0 0
Bits 0 – 7: MAC Read Data 2 (MACRD16-23) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
SU.MACRD3
Register Description: MAC Read Data byte 3
Register Address: 145h
Bit
# 7 6 5 4 3 2 1 0
Name MACRD31 MACRD30 MACRD29 MACRD28 MACRD27 MACRD26 MACRD25 MACRD24
Default 0 0 0 0 0 0 0 0
Bits 0 – 7: MAC Read Data 3 (MACRD24-31) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
SU.MACWD0
Register Description: MAC Write Data 0
Register Address: 146h
Bit
# 7 6 5 4 3 2 1 0
Name MACWD7 MACWD6 MACWD5 MACWD4 MACWD3 MACWD2 MACWD1 MACWD0
Default 0 0 0 0 0 0 0 0
Bits 0 – 7: MAC Write Data 0 (MACWD0-7) One of four bytes of data to be written to the MAC. Data has been
written after a write command has been issued and the SU.MACRWC.MCS bit is zero.