Maxim Integrated DS33R11 User Manual

Page 222

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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

222 of 344


Register Name:

TR.IMR4

Register Description:

Interrupt Mask Register 4

Register Address:

1Dh


Bit

# 7 6 5 4 3 2 1 0

Name RAIS-CI RSAO RSAZ TMF TAF RMF RCMF RAF
Default

0 0 0 0 0 0 0 0


Bit 7: Receive AIS-CI Event (RAIS-CI)

0 = interrupt masked
1 = interrupt enabled


Bit 6: Receive Signaling All-Ones Event (RSAO)

0 = interrupt masked
1 = interrupt enabled


Bit 5: Receive Signaling All-Zeros Event (RSAZ)

0 = interrupt masked
1 = interrupt enabled


Bit 4: Transmit Multiframe Event (TMF)

0 = interrupt masked
1 = interrupt enabled


Bit 3: Transmit Align Frame Event (TAF)

0 = interrupt masked
1 = interrupt enabled


Bit 2: Receive Multiframe Event (RMF)

0 = interrupt masked
1 = interrupt enabled


Bit 1: Receive CRC4 Multiframe Event (RCMF)

0 = interrupt masked
1 = interrupt enabled


Bit 0: Receive Align Frame Event (RAF)

0 = interrupt masked
1 = interrupt enabled



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