9 t1/e1/j1 line interface, 10 clock synthesizer, 11 jitter attenuator – Maxim Integrated DS33R11 User Manual

Page 13: T1/e1/j1 l, Nterface, Lock, Ynthesizer, Itter, Ttenuator

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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

13 of 344

2.9 T1/E1/J1 Line Interface

• Requires only a 2.048MHz master clock for both E1 and T1 operation with the option to use 1.544MHz

for T1 operation

• Fully software configurable
• Short-haul and long-haul applications
• Automatic receive sensitivity adjustments
• Ranges include 0 to 43dB or 0 to 12dB for E1 applications and 0 to 13dB or 0 to 36dB for T1

applications

• Receive level indication in 2.5dB steps from -42.5dB to -2.5dB
• Internal receive termination option for 75Ω, 100Ω, and 120Ω lines
• Internal transmit termination option for 75Ω, 100Ω, and 120Ω lines
• Monitor application gain settings of 20dB, 26dB, and 32dB
• G.703 receive synchronization-signal mode
• Flexible transmit waveform generation
• T1 DSX-1 line build-outs
• T1 CSU line build-outs of -7.5dB, -15dB, and -22.5dB
• E1 waveforms include G.703 waveshapes for both 75Ω coax and 120Ω twisted cables
• AIS generation independent of loopbacks
• Alternating ones and zeros generation
• Square-wave output
• Open-drain output option
• NRZ format option
• Transmitter power-down
• Transmitter 50mA short-circuit limiter with current-limit-exceeded indication
• Transmit open-circuit-detected indication
• Line interface function can be completely decoupled from the framer/formatter

2.10 Clock Synthesizer

• Output frequencies include 2.048MHz, 4.096MHz, 8.192MHz, and 16.384MHz
• Derived from recovered receive clock

2.11 Jitter Attenuator

• 32-bit or 128-bit crystal-less jitter attenuator
• Requires only a 2.048MHz master clock for both E1 and T1 operation with the option to use 1.544MHz

for T1 operation

• Can be placed in either the receive or transmit path or disabled
• Limit trip indication

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