2 hardware overview – Kane Industries C6713CPU User Manual

Page 9

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H

ARDWARE

R

EFERENCE

G

UIDE

MICRO

-

LINE

®

C6713CPU

Date : 28 November 2005
Doc. no. : C6713CPU_HRG
Iss./Rev : 1.1
Page : 9

2 Hardware

Overview

The micro-line

®

C6713CPU is a high performance DSP board that combines several key

technologies for high speed data processing:

• a TMS320C6713 DSP with 256 KB internal fast SRAM and 225MHz or 300MHz CPU clock

(1800 MIPS / 1350 MFLOPS or 2400 MIPS / 1800 MFLOPS)

• a Xilinx Spartan 3 FPGA with up to 1M gates

• 32 / 64 MB SDRAM in standard versions and 128 MB on request

• 2 MB flash memory for non-volatile program, data and FPGA design storage


The C6713CPU is available in different versions, regarding processor speed and memory size.
Please contact ORSYS or ORSYS distributors for the newest product list.
For proper operation of the micro-line

®

C6713CPU ORSYS recommends the desk carrier micro-

line

®

PowerSupply board which provides:

• 3.3 V regulated power supply for the C6713CPU

• a 9-Pin SUB-D connector for the RS-232 interface

• a reset button

• Two isolated ±15 V DC/DC converters for peripheral I/O power supply (optional)


ORSYS furthermore offers complete development packages including Code Composer Studio,
XDS510 JTAG emulator/debugger or equivalent types and all necessary accessories like cables,
power supplies and software libraries.

This documentation describes the basic features of the C6713CPU. It does not include details of
the FPGA or the DSP. For further information about the FPGA, please refer to Xilinx [2]. For further
information about the DSP, please refer to Texas Instruments [1]. A good starting point is also the
chapter "documentation support" in [4].

Many operational features of the C6713CPU require the use of a specific FPGA design, which is
provided by an according board support package (BSP).

The FPGA of the C6713CPU can be used either with the default BSP from ORSYS which is pre-
installed when the C6713CPU is shipped, or with individual custom designs using the FPGA
development option. The default BSP from ORSYS allows to operate the C6713CPU as a standard
micro-line

®

DSP board. In this case it is logically upward compatible to other existing micro-line

®

products such as the C6711CPU (if the C6711CPU is operated with 3.3V only).

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