Xilinx V2.1 - Manual (Page 139)

Xilinx ISE 4.1i Project Navigator 139
Using the Xilinx Software
Chapter 5
Using the Xilinx Software
This chapter describes how to process your System Generator design with the Xilinx
downstream software tools. Sections in this chapter are:
•
Xilinx ISE 4.1i Project Navigator
•
Using an EDIF software flow
•
Simulation
•
Xilinx software tools resources
Xilinx ISE 4.1i Project Navigator
During code generation, the System Generator creates several project files for use in
Xilinx and partner software tools. One is for the Xilinx 4.1i ISE Project Navigator tool.
By opening this project file, you can import your System Generator design into the
Project Navigator, and from there, you can synthesize, simulate, and implement the
design in the Xilinx 4.1i software tools environment.
This file is called <name of project>.npl . We will use the name
my_project.npl for the following discussion.
Opening a System Generator project
You may double-click on your . npl file in Windows Explorer. The Project Navigator
file association with . npl will cause Project Navigator to launch, opening your
my_project.npl System Generator design project.
You may also open the Project Navigator tool directly, then choose File >> Open
Project from the top level pulldown menu. Browse to the location of your System
Generator my_project.npl and open it.
Customizing your System Generator project
When first opening your System Generator project, you will receive a warning
indicating that you have not set up a device package. This is because System
Generator did not require that you enter a device package before generating VHDL.
You may now configure the rest of your Xilinx design by opening the Project