Xilinx V2.1 - Manual (Page 15)

What is a Xilinx Block? 15
Xilinx Blockset Overview
Chapter 2
Xilinx Blockset Overview
This chapter gives an overview of the Xilinx Blockset, including background
information on underlying blockset implementation, which will help you understand
how each block can be used to create and simulate your designs.
This chapter contains the following sections.
•
What is a Xilinx Block?
•
Instantiating Xilinx Blocks Within a Simulink Model
•
The Block Parameters Dialog Box
•
The Nature of Signals in the Xilinx Blockset
•
Use of Xilinx Smart-IP Cores by the System Generator
•
Common Options in Xilinx Block Parameters Dialog Box
What is a Xilinx Block?
The Xilinx Blockset is a Simulink
library, accessible from the Simulink
library browser. It consists of building
blocks that can be instantiated within
a Simulink model and, like other
Simulink blocksets, blocks can be
combined to form subsystems and
arbitrary hierarchies. The Xilinx
Gateway blocks (from the Xilinx
Blockset’s MATLAB I/O library) are
used to interface between the Xilinx
Blockset fixed point data type and
other Simulink blocks.
Every Xilinx Block can be configured
using a block parameters dialog box, with
few exceptions even during
simulation. Many blocks share
common parameters, which are
described later in this chapter. Most
also have parameters specific to the
function computed.
The System Generator is able to
generate an FPGA implementation consisting of RTF VHDL and Xilinx Smart-IP

Cores from a Simulink subsystem built from the Xilinx Blockset. The overall design,
including test environment, may consist of arbitrary Simulink blocks. However, the