Xilinx V2.1 - Manual (Page 69)

Communication 69
Xilinx Blocks
Block Interface
The Viterbi Decoder has either two or three input
ports and one output port. The decoder can have
either two or three input ports depending on the
configurable parameter indicating encoder
output rate. Use of hard coding requires input
data to be 1 bit wide. Soft coding requires the
input data to be 3 to 8 bits (inclusive). The output
port is of type UFix1_0 .
Note - This version of the Viterbi Decoder is not recommended for implementation of
punctured codes.
Block Parameters Dialog Box
Figure 3-45: Viterbi Decoder block parameters dialog box
Parameters specific to the Viterbi Decoder block are:
•
Encoder Output Rate : 2 or 3. must match the output rate on the
Convolutional Encoder from which data is being decoded.
9 111101101, 110011011 111101101, 110011011, 100100111
Constraint
length
Optimal convolution codes for
decoding 1/2 rate encoders
Optimal convolution codes for
decoding 1/3 rate encoders