ARM VERSION 1.2 - Manual (Page 131)

ARM Instruction Reference
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 4-21
Usage
Use PLD to hint to the memory system that there is likely to be a load from the specified
address within the next few instructions. The memory system can use this to speed up
later memory accesses.
Alignment
There are no alignment restrictions on the address. If a system control coprocessor
(cp15) is present then it will not generate an alignment exception for any
PLD instruction.
Architectures
This instruction is available in E variants of ARM architecture v5 and above.
Examples
PLD [r2]
PLD [r15,#280]
PLD [r9,#-2481]
PLD [r0,#av*4] ; av * 4 must evaluate, at assembly time, to
; an integer in the range -4095 to +4095
PLD [r0,r2]
PLD [r5,r8,LSL 2]