ARM VERSION 1.2 - Manual (Page 276)

Vector Floating-point Programming
6-38 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
6.8 VFP pseudo-instruction
There is one VFP pseudo-instruction.
6.8.1 FLD pseudo-instruction
The FLD pseudo-instruction loads a VFP floating-point register with a single-precision
or double-precision floating-point constant.
Note
You can use FLD only if the command line option -fpu is set to vfp or softvfp+vfp .
This section describes the FLD pseudo-instruction only. See FLD and FST on page 6-23
for information on the FLD instruction.
Syntax
FLD<precision>{cond} fp-register,=fp-literal
where:
<precision>
can be S for single-precision, or D for double-precision.
cond is an optional condition code.
fp-register is the floating-point register to be loaded.
fp-literal is a single-precision or double-precision floating-point literal (see
Floating-point literals on page 3-22).
Usage
The assembler places the constant in a literal pool and generates a program-relative FLD
instruction to read the constant from the literal pool. One word in the literal pool is used
to store a single-precision constant. Two words are used to store a double-precision
constant.
The offset from pc to the constant must be less than 1KB. You are responsible for
ensuring that there is a literal pool within range. See LTORG on page 7-14 for more
information.