ARM VERSION 1.2 - Manual (Page 165)

ARM Instruction Reference
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 4-55
4.5 ARM saturating arithmetic instructions
These operations are saturating ( SAT ). This means that if overflow occurs:
• the Q flag is set
• if the full result would be less than –2 31 , the result returned is –2 31
• if the full result would be greater than 2 31 –1, the result returned is 2 31 –1.
The Q flag can also be set by two other instructions (see SMLAxy on page 4-46 and
SMLAWy on page 4-49), but these instructions do not saturate.
4.5.1 QADD, QSUB, QDADD, and QDSUB
Saturating Add, Saturating Subtract, Saturating Double and Add, Saturating Double
and Subtract.
Syntax
op{cond} Rd, Rm, Rn
where:
op is one of QADD , QSUB , QDADD , or QDSUB .
cond is an optional condition code (see Conditional execution on page 4-4).
Rd is the ARM register for the result.
Rm, Rn are the ARM registers holding the operands.
r15 cannot be used for any of Rd , Rm , or Rn .
Usage
The QADD instruction adds the values in Rm and Rn .
The QSUB instruction subtracts the value in Rn from the value in Rm .
The QDADD instruction calculates SAT(Rm + SAT(Rn * 2)) . Saturation can occur on the
doubling operation, on the addition, or on both. If saturation occurs on the doubling but
not on the addition, the Q flag is set but the final result is unsaturated.
The QDSUB instruction calculates SAT(Rm - SAT(Rn * 2)) . Saturation can occur on the
doubling operation, on the subtraction, or on both. If saturation occurs on the doubling
but not on the subtraction, the Q flag is set but the final result is unsaturated.