4 high speed board, 4 high speed board -6 – Fluke 900 User Manual
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Theory of Operation
FLUKE 900 SERVICE MANUAL
2.4 High Speed Board
The accompanying diagram shows one chamiel routing a signal from the test clip through the
Interface Buffer to the High Speed Board (H3) where it is processed by Dynamic Reference
Comparison. The Micro Board then receives indicators from the H3 to display a test result There
are 28 such channels in parallel. The circuit elements that are depicted as latches in the diagram
are implemented with shift registers that are first serial loaded, then clocked to a parallel ou^t
latch. The diagram’s latches are single bits of a 28 bit shift register comprised of four cascad^ 8
bit 74595s.
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