Memory maps – Comtrol eCos User Manual

Page 240

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Chapter 5. Installation and Testing

#define CYGNUM_HAL_INTERRUPT_BIU_ERR

17

#define CYGNUM_HAL_INTERRUPT_ATU_ERR

18

#define CYGNUM_HAL_INTERRUPT_MCU_ERR

19

#define CYGNUM_HAL_INTERRUPT_DMA0_ERR

20

#define CYGNUM_HAL_INTERRUPT_DMA1_ERR

22

#define CYGNUM_HAL_INTERRUPT_AA_ERR

23

#define CYGNUM_HAL_INTERRUPT_MSG_ERR

24

#define CYGNUM_HAL_INTERRUPT_SSP

25

#define CYGNUM_HAL_INTERRUPT_RSVD_26

26

#define CYGNUM_HAL_INTERRUPT_XINT0

27

#define CYGNUM_HAL_INTERRUPT_XINT1

28

#define CYGNUM_HAL_INTERRUPT_XINT2

29

#define CYGNUM_HAL_INTERRUPT_XINT3

30

#define CYGNUM_HAL_INTERRUPT_HPI

31

The data passed to the ISR is pulled from a data table

(hal_interrupt_data)

which immediately follows the

interrupt vector table. With 32 interrupts, the data table starts at address 0x8084.

An application may create a normal C function with the above prototype to be an ISR. Just poke its address into the
table at the correct index and enable the interrupt at its source. The return value of the ISR is ignored by RedBoot.

Memory Maps

The RAM based page table is located at RAM start + 0x4000. RedBoot may be configured for one of two memory
maps. The difference between them is the location of RAM and the PCI outbound windows. The alternative mem-
ory map may be used when building RedBoot or eCos by using the

RAM_ALTMAP

and

ROM_ALTMAP

startup types in

the configuration.

NOTE: The virtual memory maps in this section use a C, B, and X column to indicate the caching policy for the
region..

X C B

Description

- - -

---------------------------------------------

0 0 0

Uncached/Unbuffered

0 0 1

Uncached/Buffered

0 1 0

Cached/Buffered

Write Through, Read Allocate

0 1 1

Cached/Buffered

Write Back, Read Allocate

1 0 0

Invalid -- not used

1 0 1

Uncached/Buffered

No write buffer coalescing

1 1 0

Mini DCache - Policy set by Aux Ctl Register

1 1 1

Cached/Buffered

Write Back, Read/Write Allocate

Physical Address Range

Description

-----------------------

----------------------------------

0x00000000 - 0x7fffffff

ATU Outbound Direct Window

0x80000000 - 0x900fffff

ATU Outbound Translate Windows

0xa0000000 - 0xbfffffff

SDRAM

0xf0000000 - 0xf0800000

FLASH

(PBIU CS0)

0xfe800000 - 0xfe800fff

UART

(PBIU CS1)

136

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