Links, Pci library reference, Pci library api – Comtrol eCos User Manual

Page 445

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Chapter 30. The eCos PCI Library

Activating the device is done by enabling flags in its command word. As an example, see the

pci1

test which can

be configured to enable the devices it finds. This allows these to be accessed from GDB (if a breakpoint is set on

cyg_test_exit

):

#ifdef ENABLE_PCI_DEVICES

{

cyg_uint16 cmd;

// Don’t use cyg_pci_set_device_info since it clears

// some of the fields we want to print out below.

cyg_pci_read_config_uint16(dev_info.devid,

CYG_PCI_CFG_COMMAND, &cmd);

cmd |= CYG_PCI_CFG_COMMAND_IO|CYG_PCI_CFG_COMMAND_MEMORY;

cyg_pci_write_config_uint16(dev_info.devid,

CYG_PCI_CFG_COMMAND, cmd);

}

diag_printf(" **** Device IO and MEM access enabled\n");

#endif

Note: The best way to activate a device is actually through

cyg_pci_set_device_info()

, but in this particular

case the cyg_pci_device structure contents from before the activation is required for printout further down in
the code.

Links

See these links for more information about PCI:

1. http://www.pcisig.com/ - information on the PCI specifications

2. http://www.yourvote.com/pci/ - list of vendor and device IDs

3. http://www.picmg.org/ - PCI Industrial Computer Manufacturers Group

PCI Library reference

This document defines the PCI Support Library for eCos.

The PCI support library provides a set of routines for accessing the PCI bus configuration space in a portable
manner. This is provided by two APIs. The high level API is used by device drivers, or other code, to access the
PCI configuration space portably. The low level API is used by the PCI library itself to access the hardware in a
platform-specific manner, and may also be used by device drivers to access the PCI configuration space directly.

Underlying the low-level API is HAL support for the basic configuration space operations. These should not gen-
erally be used by any code other than the PCI library, and are present in the HAL to allow low level initialization
of the PCI bus and devices to take place if necessary.

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