Chapter 18. device driver interface to the kernel, Interrupt model, Synchronization – Comtrol eCos User Manual

Page 389: Device driver interface to the kernel

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Chapter 18. Device Driver Interface to the Kernel

This chapter describes the API that device drivers may use to interact with the kernel and HAL. It is primarily
concerned with the control and management of interrupts and the synchronization of ISRs, DSRs and threads.

The same API will be present in configurations where the kernel is not present. In this case the functions will be
supplied by code acting directly on the HAL.

Interrupt Model

eCos presents a three level interrupt model to device drivers. This consists of Interrupt Service Routines (ISRs) that
are invoked in response to a hardware interrupt; Deferred Service Routines (DSRs) that are invoked in response to
a request by an ISR; and threads that are the clients of the driver.

Hardware interrupts are delivered with minimal intervention to an ISR. The HAL decodes the hardware source of
the interrupt and calls the ISR of the attached interrupt object. This ISR may manipulate the hardware but is only
allowed to make a restricted set of calls on the driver API. When it returns, an ISR may request that its DSR should
be scheduled to run.

A DSR will be run when it is safe to do so without interfering with the scheduler. Most of the time the DSR will
run immediately after the ISR, but if the current thread is in the scheduler, it will be delayed until the thread is
finished. A DSR is allowed to make a larger set of driver API calls, including, in particular, being able to call

cyg_drv_cond_signal()

to wake up waiting threads.

Finally, threads are able to make all API calls and in particular are allowed to wait on mutexes and condition
variables.

For a device driver to receive interrupts it must first define ISR and DSR routines as shown below,
and then call

cyg_drv_interrupt_create()

. Using the handle returned, the driver must then call

cyg_drv_interrupt_attach()

to actually attach the interrupt to the hardware vector.

Synchronization

There are three levels of synchronization supported:

1. Synchronization with ISRs. This normally means disabling interrupts to prevent the ISR running during

a critical section. In an SMP environment, this will also require the use of a spinlock to synchronize with
ISRs, DSRs or threads running on other CPUs. This is implemented by the

cyg_drv_isr_lock()

and

cyg_drv_isr_unlock()

functions. This mechanism should be used sparingly and for short periods only.

For finer grained synchronization, individual spinlocks are also supplied.

2. Synchronization with DSRs. This will be implemented in the kernel by taking the scheduler lock to prevent

DSRs running during critical sections. In non-kernel configurations it will be implemented by non-kernel code.
This is implemented by the

cyg_drv_dsr_lock()

and

cyg_drv_dsr_unlock()

functions. As with ISR syn-

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