Comtrol eCos - Manual (Page 341)

Chapter 11. Porting Guide
cdl_option CYGHWR_HAL_MIPS_FPU {
display "Variant FPU support"
calculated 1
}
cdl_option CYGHWR_HAL_MIPS_FPU_64BIT {
display "Variant 64 bit FPU support"
calculated 1
}
These tell the architecture that this is a 64 bit MIPS architecture, that it has a floating point unit, and that we are
going to use it in 64 bit mode rather than 32 bit mode.
The CDL file finishes off with some build options.
define_proc {
puts $::cdl_header "#include < pkgconf/hal_mips.h > "
}
compile var_misc.c
make {
< PREFIX > /lib/target.ld: < PACKAGE > /src/mips_vr4300.ld
$(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $ <
@echo $@ ": \\" > $(notdir $@).deps
@tail +2 target.tmp >> $(notdir $@).deps
@echo >> $(notdir $@).deps
@rm target.tmp
}
cdl_option CYGBLD_LINKER_SCRIPT {
display "Linker script"
flavor data
no_define
calculated { "src/mips_vr4300.ld" }
}
}
The define_proc causes the architecture configuration file to be included into the configuration file for the variant.
The compile causes the single source file for this variant, var_misc.c to be compiled. The make command emits
makefile rules to combine the linker script with the .ldi file to generate target.ld . Finally, in the MIPS HALs,
the main linker script is defined in the variant, rather than the architecture, so CYGBLD_LINKER_SCRIPT is defined
here.
Cache Support
The main area where the variant is likely to be involved is in cache support. Often the only thing that distinguishes
one CPU variant from another is the size of its caches.
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