Altera Cyclone V GT FPGA - Manual (Page 39)

Chapter 6: Board Test System 6–17
The Power Monitor
September 2014 Altera Corporation Cyclone V GT FPGA Development Kit
User Guide
PMA Setting —Only available for the XCVR test. This control allows you to make
changes to the PMA parameters that affect the active transceiver interface. The
following settings are available for analysis:
■ Serial Loopback —Routes the selected TX output signal back to the RX input
signal on-chip to verify operation without using an external loopback board.
■ VOD —Specifies the voltage output differential of the transmitter buffer.
■ Pre-emphasis tap
Pre —Not available.
First post —Specifies the amount of pre-emphasis on the first post tap of the
transmitter buffer.
Second post —Not available.
■ Equalizer —Specifies the setting for the receiver equalizer.
■ DC gain —Specifies the DC portion of the receiver equalizer.
Data Type —Specifies the type of data contained in the transactions. The following
data types are available for analysis:
■ PRBS7 —Pseudo-random 7-bit sequences
■ PRBS15 —Pseudo-random 15-bit sequences
■ PRBS23 —Pseudo-random 23-bit sequences
■ PRBS31 —Pseudo-random 31-bit sequences
■ HF —Highest frequency divide-by-4 data pattern 10101010
■ LF —Lowest frequency divide-by-4 data pattern 11110000
The Power Monitor
You can start the Power Monitor application with the following:
■ The Power Monitor button on the Board Test System GUI.
■ The PowerMonitor.exe application that resides in the <install
dir>\kits\cycloneVGT_5cgtfd9ef35_fpga\examples\board_test_system
directory.
■ The Windows Start menu: All Programs > Altera > Cyclone V GT FPGA
Development Kit
<version> > Power Monitor.