Altera SDI HSMC - Manual (Page 22)

2–14 Chapter 2: Board Components
Audio/Video Input and Output
SDI HSMC Reference Manual © July 2009 Altera Corporation
Audio/Video Input and Output
This section describes the I/O channels of the SDI HSMC which includes:
■ SDI RX Channels
■ SDI TX Channels
■ AES3 RX Channels
■ AES3 TX Channels
SDI RX Channels
The SDI RX channel consists of an SDI cable equalizer (LMH0344) with bypass, an
input matching network, an input vertical mount with a 4-GHz BNC connector, a
bypass control signal, DC blocking caps on the input and output, and a carrier detect
LED.
f
For the RX channel circuit diagram, refer to the schematic page entitled RX1/2
Equalizer on page 3 and 4 of the Altera schematic 150-0320610-B1. In Altera
development kits that contain the SDI HSMC, this schematic resides in the
<install dir>\board_design_files directory.
Jumpers J4 and J6 short the CD_MUTE signal and connect carrier detect to the mute
input of the SDI receiver equalizer. In normal operation, these two jumpers are
installed. Jumpers J5 and J7 short the EQ_BYPASS signal to ground, thus not
bypassing the input cable equalizer portion of the SDI cable equalizer. A 10-k
Ω
resistor sets the signal to 3.3 V on both channels. This signal can also be controlled by
the host through the HSMC connector (pins 77 and 79 of the HSMC connector).
Jumpers J5 and J7 are normally not installed. If the HSMC host does not drive this
signal, then the SDI cable equalizer is in bypass mode.
The RX channel receives 270 Mbps, 1.485 Gbps, and 2.970 Gbps SDI signals through a
single-ended 75-
Ω BNC connector. The signals traverse an impedance-matching
network provided by the manufacturer. The input signal is terminated to ground with
a 75-
Ω external resistor and is input into the SDI cable equalizer via a 1-µF DC
blocking capacitor. The opposite leg of the SDI cable equalizer's differential input pin
is terminated in the same way as the input signal and serves to correctly balance the
input bias currents internal to the equalizer. The equalizer then equalizes the signal
and outputs a 100-
Ω differential signal to the SERDES receiver located on the host
HSMC device. The differential output of the SDI cable equalizer passes through 1-µF
DC blocking capacitors.
There are bi-colored LEDs next to the RX BNC connectors. The LEDs are connected to
3.3V_SDI
power rail through a 75-
Ω resistor and are controlled by signals
SDI_LED_RX_G and SDI_LED_RX_R. These signals are connected to the HSMC
connector and driven from the host board. The LEDs illuminate when a zero is driven
on the LED control signals. The voltage drop across the LED is approximately 2.1 V. A
zero voltage at the HSMC connector on the LED control signals causes a drop of
16 mA. Knowing this information, you can program the four states of the LEDs to
indicate the RX bit rate.
Figure 2–7 shows the SDI RX channel block diagram.