Altera Cyclone II FPGA Starter Development Board - Manual (Page 17)

Altera Corporation Reference Manual 1–9
October 2006 Cyclone II FPGA Starter Development Board
Introduction
■ A switch produces logic 0 when in the DOWN
(closest to the edge of the board) position
and logic 1 when in the UP position
Clock Inputs
■ 50-MHz oscillator
■ 27-MHz oscillator
■ 24-MHz oscillator
■ SMA external clock input
Audio CODEC
■ Wolfson WM8731 24-bit sigma-delta audio CODEC
■ Line-level input, line-level output, and microphone input jacks
■ Sampling frequency: 8 to 96 KHz
■ Applications for MP3 players and recorders, PDAs,
smart phones, voice recorders
VGA Output
■ Uses a 4-bit resistor-network DAC
■ 15-pin high-density D-sub connector
■ Supports up to 640x480 at 60-Hz refresh rate
■ Can be used with the Cyclone II FPGA to implement
a high-performance TV encoder
Serial Ports
■ One RS-232 port
■ One PS/2 port
■ DB-9 serial connector for the RS-232 port
■ PS/2 connector for connecting a PS2 mouse
or keyboard to the board
Dual 40-Pin Expansion Headers
■ 72 Cyclone II I/O pins and 8 power and ground lines
connect to two, 40-pin expansion connectors
■ 40-Pin header designed to accept a standard 40-pin
ribbon cable used for IDE hard drives
■ Resistor protection provided