Altera Cyclone II FPGA Starter Development Board - Manual (Page 24)

2–6 Reference Manual Altera Corporation
Cyclone II FPGA Starter Development Board October 2006
Development Board Components
This device features microphone-in, line-in, and line-out ports, with a
sample rate adjustable from 8 kHz to 96 kHz. A serial I2C bus interface
connected to FPGA pins controls the WM8731 CODEC.
f
For information about the WM8731 CODEC, refer to the
BoardDesignFiles\Datasheet
folder in the kit installation directory or to
the manufacturer's web site.
Audio Circuit Schematic
Figure 2–3 shows the audio circuit schematic.
Figure 2–3. Audio Circuit Schematic Diagram