Epson S5U1C63000A - Manual (Page 67)

CHAPTER 4: ASSEMBLER
S5U1C63000A MANUAL EPSON 53
(S1C63 FAMILY ASSEMBLER PACKAGE)
4.5.2 Instructions (Mnemonics and Pseudo-instructions)
The assembler supports all the mnemonics of the S1C63000 instruction set and the assembler pseudo-
instructions. The following shows how to describe the instructions.
Mnemonics
An instruction is generally composed of [mnemonic] + [operand]. Some instructions do not contain an
operand.
General notation forms of instructions
General forms: <Mnemonic>
<Mnemonic>
tab or space <Operand>
<Mnemonic> tab or space <Operand1>, <Operand2>
<Mnemonic> tab or space <Operand1>, <Operand2>, <Operand3>
Examples: nop
jr NMI
ld %f,0x4
There is no restriction as to where the description of a mnemonic should begin in a line. A tab or space
preceding a mnemonic is ignored.
An instruction containing an operand needs to be separated into the mnemonic and the operand with
one or more tabs or spaces. If an instruction requires multiple operands, the operands must be
separated from each other with one comma (,). Space between operands is ignored.
The elements of operands will be described further below.
Types of mnemonics
The following 39 types of mnemonics can be used in the S1C63 Family:
add adc and bit calr calz clr cmp dec ex halt inc int jp jr jrc jrnc jrnz
jrz ld ldb nop or pop push ret retd reti rets rl rr sbc set sll slp srl sub
tst xor
For details on instructions, refer to the "S1C63000 Core CPU Manual".
Note
The assembler is commonly used for all the S1C63 Family models, so all the instructions can be
accepted. Be aware that no error will occur in the assembler even if instructions or operands unavail-
able for the model are described. They will be checked in the linker.
Assembler pseudo-instructions
The assembler pseudo-instructions are not converted to execution codes, but they are designed to
control the assembler or to set data.
For discrimination from other instructions, all the assembler pseudo-instructions begin with a sharp
(#) or a period (.).
General notation forms of pseudo-instructions
General forms: <Pseudo-instruction>
<Pseudo-instruction>
tab or space <Parameter>
<Pseudo-instruction> tab or space <Parameter1> tab, space or comma <Parameter2> ...
Examples: #define SW1 1
.org 0x100
.comm BUF 4
There is no restriction as to where the description of an instruction may begin in a line.
An instruction containing a parameter needs to be separated into the instruction and the parameter
with one or more tabs or spaces. If an instruction requires multiple parameters, they are separated
from each other with an appropriate delimiter.